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SMC512AF View Datasheet(PDF) - Numonyx -> Micron

Part Name
Description
MFG CO.
'SMC512AF' PDF : 82 Pages View PDF
SMCxxxAF
Card configuration
6.5
Attribute memory function
Attribute memory is a space where identification and configuration information are stored,
and is limited to 8 bit wide accesses at even addresses. The Card Configuration registers
are also located here, the base address of the configuration registers is 200h.
For the attribute memory Read function, signals REG and OE must be active and WE
inactive during the cycle. As in the main memory read functions, the signals CE1 and CE2
control the even and odd byte address, but only the even byte data is valid during the
attribute memory access. Refer to Table 31 for signal states and bus validity.
Table 31. Attribute memory function(1)
Function mode –REG –CE2 –CE1 A10 A9 A0 –OE –WE D15 to D8 D7 to D0
Standby
X
H
H
X
X
X
X
X High-Z
High-Z
Read Byte Access CIS
(8 bits)
L
H
L
L
L
L
L
H High-Z
Even byte
Write Byte Access CIS
(8 bits) Invalid
L
H
L
L
L
L
H
L Don’t care Even byte
Read Byte Access
Configuration
(8 bits)
L
H
L
L
H
L
L
H High-Z
Even byte
Write Byte Access
Configuration
(8 bits)
L
H
L
L
H
L
H
L Don’t care Even byte
Read Byte Access
Configuration CF+ (8
bits)
L
H
L
X
X
L
L
H High-Z
Even byte
Read Word Access CIS
L
L
L
L
L
X
L
H Not valid Even byte
(16 bits)
Write Word Access CIS
L
L
L
L
L
X
H
L Don’t care Even byte
(16 bits) Invalid
Read Word Access
Configuration (16 bits)
L
L
L
L
H
X
L
H Not valid Even byte
Write Word Access
Configuration (16 bits)
L
L
L
L
H
X
H
L Don’t care Even byte
1. The CE signal or both the OE signal and the WE signal must be de-asserted between consecutive cycle operations.
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