SMC512BFY6 View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
SMC512BFY6
Numonyx -> Micron
'SMC512BFY6' PDF : 91 Pages View PDF
SMCxxxBF
CF-ATA registers
9.9.8
Bit 0 (ERR)
This bit is set when the previous command has ended in some type of error. The bits in the
Error register contain additional information describing the error. In case of read or write
access commands that end with an error, the address of the first sector with an error is in
the command block registers. This bit is cleared by the next command.
Table 45. Status & Alternate Status Register
D7
D6
D5
D4
D3
D2
D1
BUSY
RDY
DWF
DSC
DRQ
CORR
0
D0
ERR
9.10
9.10.1
9.10.2
9.10.3
9.10.4
Device Control Register
The Device COntrol register is located at address 3F6h [376h], offset Eh.
This Write-only register is used to control the CompactFlash Memory Card interrupt request
and to issue an ATA soft reset to the Card. This register can be written even if the device is
BUSY. The bits are defined as follows:
Bit 7 to 3
Don’t care. The host should reset this bit to ‘0’.
Bit 2 (SW Rst)
This bit is set to 1 in order to force the CompactFlash Storage Card to perform an AT Disk
controller Soft Reset operation. This clears Status Register and writes Diagnostic Code in
Error register after a Write or Read Sector error. The Card remains in Reset until this bit is
reset to ‘0.’
Bit 1 (–IEn)
When the Interrupt Enable bit is set to ‘0’, –IREQ interrupts are enabled. When the bit is set
to ‘1’, interrupts from the Card are disabled. This bit also controls the Int bit in the Card
Configuration and Status Register. It is set to ‘0’ at Power On.
Bit 0
This bit is set to ‘0’.
Table 46. Device Control Register
D7
D6
D5
D4
D3
D2
D1
D0
X(0)
X(0)
X(0)
X(0)
X(0)
SW Rst
–IEn
0
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