SMM105NECR05 View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
SMM105NECR05
Summit Microelectronics
'SMM105NECR05' PDF : 21 Pages View PDF
I2C PROGRAMMING INFORMATION (CONTINUED)
SMM105
Preliminary Information
M aster
Slave
S
T
A
Configuration
R
T
Bus Address
Register Address = 42HEX
S
T
Data = 55HEX
O
P
S
A
S
A
S
A
SA
A2
A
1
AW
0
3210
10000010
01010101
A
A
A
C
C
C
K
4HEX
2HEX
K
K
Write Protection
Register Address
5HEX Unlocks
General Purpose
5HEX Unlocks
Configuration
EE
Registers
M aster
Slave
Figure 9 – Write Protection Register Write
S
T
A
R
Bus Address
Configuration
Register Address
T
S
T
Data
O
P
S
A
S
A
S
A
SA
A2
A
1
AW
0
3210
CCCCCCCC
76543210
DDDDDDDD
76543210
A
A
A
C
C
C
K
K
K
Figure 10 – Configuration Register Byte Write
M aster
Slave
S
T
A
Configuration
R
Bus Address
Register Address
T
Data (1)
S
A
S
A
S
A
SA
A2
A
1
A
0
W
3210
CCCCCCCC
76543210
DDDDDDDD
76543210
A
A
A
C
C
C
K
K
K
M aster
Slave
Data (2)
DDDDDDDD
76543210
DDD
765
A
C
K
S
T
Data (16)
O
P
DDD
210
DDDDDDDD
76543210
A
A
C
C
K
K
Figure 11 – Configuration Register Page Write
Summit Microelectronics, Inc
2068 1.8 09/20/05
15
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