SMM105NER00 View Datasheet(PDF) - Summit Microelectronics

Part Name

Description

MFG CO.

SMM105NER00

Single-Channel Supply Voltage Marginer and Active DC Output Controller

Summit Microelectronics

'SMM105NER00' PDF : 21 Pages View PDF

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INTERNAL BLOCK DIAGRAM
VREF_CNTL
VREF
MUX
V+
COMP1
OV/UV
V-
COMP2
OV/UV
Output
Control
SMM105
Preliminary Information
Trim
Drive
READY
FAULT#
TRIM
TRIM_CAP
START
W P#
A0
A1
A2
SDA
SCL
12VIN
VDD
VDD_CAP
I2C Serial
Interface
3.6/5V
Regulator
Supply
Arbitration
EE
Configuration
Registers
& Memory
Input Voltage
Sensing and
Signal
VM
Conditioning
Figure 3 – SMM105 Controller Internal Block Diagram.
PACKAGE AND PIN CONFIGURATION
28 Pin QFN
Top View
25 Ball Ultra CSPTM
Bottom View
Pin 1
28 27 26 25 24 23 22
SCL 1
A2 2
START 3
A1 4
READY 5
A0 6
GND 7
SMM105
21 VDD
20 TRIM
19 COMP1
18 TRIM_CAP
17 NC
16 NC
15 NC
8 9 10 11 12 13 14
Pin 1
SCL
A2
A1 A2
START A1
B1 B2
SDA VDD_CAP 12VIN
A3 A4 A5
NC VDD TRIM
B3 B4 B5
READY A0
C1 C2
NC COMP1 TRIM_CAP
C3 C4 C5
GND VREF_CNTL FAULT# NC
NC
D1 D2 D3 D4 D5
WP# FILT_CAP COMP2 VM
NC
E1 E2 E3 E4 E5
Summit Microelectronics, Inc
2068 1.8 09/20/05
3

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