SMM153 View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
'SMM153' PDF : 18 Pages View PDF
INTERNAL BLOCK DIAGRAM
VREF
VDD
VDD_CAP
GND
VREF
VREF = 1.25V
50kΩ
A0
A1
A2
I2C
SCL
Interface
SDA
WP
SMM153
FAULT#
Output
Control
Glitch
Filter
OV/UV 0.5V/1.25V
COMP1
OV/UV
COMP2
Clock
GPIO0
GPIO1
GPIO2
GPIO3
Control
Logic
10-Bit
ADC
EE
Configuration 25kΩ 25kΩ
Registers
& Memory
MUX
250kΩ
CAPM+
CAPM-
VM+
VM-
CAPC
CS+
DIFF
AMP
CS-
Figure 2 – SMM153 Controller Internal Block Diagram.
PACKAGE AND PIN CONFIGURATION
28-Pad 5x5 QFN
Top View
Pin 1
28 27 26 25 24 23 22
SCL 1
A2 2
GPIO0 3
A1 4
GND 5
A0 6
GND 7
SMM150
21 VDD
20 N/C
19 COMP1
18 CS+
17 CS-
16 CAPC
15 VM-
8 9 10 11 12 13 14
Summit Microelectronics, Inc
2134 3.0 1/20/2010
3
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