SMS8198S View Datasheet(PDF) - Summit Microelectronics
Part Name
Description
MFG CO.
SMS8198S
Summit Microelectronics
'SMS8198S' PDF : 14 Pages View PDF
SCL
SDA In
SMS8198
Data must
remain stable
while clock
is HIGH.
Change
of data
allowed
Data must
remain stable
while clock
is HIGH.
tHD:DAT
tSU:DAT
Figure 3. Input Data Protocol
tHD:DAT
2036 ILL4.0
SCL from
Master
Data Output
from
Transmitter
Start
Condition
Data Output
from
Receiver
1
8
9
tAA
tAA
Figure 4. Acknowledge Response From Receiver
ACKnowledge
2036 ILL6.0
2036 5.0 4/18/00
5
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