SN8P1602B View Datasheet(PDF) - Sonix Technology Co., Ltd
Part Name
Description
MFG CO.
'SN8P1602B' PDF : 76 Pages View PDF
5 SYSTEM REGISTER
SN8P1602B
8-Bit Micro-Controller
OVERVIEW
The RAM area located in 80H~FFH bank 0 is system register area. The main purpose of system registers is to control
peripheral hardware of the chip. Using system registers can control I/O ports, timers and counters by programming.
The memory map provides an easy and quick reference source for writing application program. These system registers
accessing is controlled by the selected memory bank (RBANK = 0) or the bank 0 read/write instruction (B0MOV,
B0BSET, B0BCLR…).
SYSTEM REGISTER ARRANGEMENT (BANK 0)
BYTES of SYSTEM REGISTER
SN8P1602B
0
1
2
3
4
5
6
7
8
9
A
B
CD
E
F
8-
-
R
Z
Y
- PFLAG RPAGE -
-
-
-
-
-
-
-
9-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
A-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
B-
-
-
-
-
-
-
-
-
-
-
-
-
-
PUR PEDGE
C P1W P1M P2M
-
-
-
-
- INTRQ INTEN OSCM -
-
-
PCL PCH
D P0
P1
P2
-
-
-
-
-
T0M
- TC0M TC0C -
-
- STKP
E-
-
-
-
-
-
-
@YZ
-
-
-
-
-
-
-
-
F-
-
-
-
-
-
-
- STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H
Description
PFLAG = ROM page and special flag register.
P1W = Port 1 wakeup register.
PnM = Port n input/output mode register.
INTRQ = Interrupt request register.
OSCM = Oscillator mode register.
TCnM = Timer n mode register.
T0M.1= TC0GN, TC0 green mode wakeup flag.
STKP = Stack pointer buffer.
@YZ = RAM YZ indirect addressing index pointer.
R = Working register and ROM look-up data buffer.
Y, Z = Working, @YZ and ROM addressing register.
Pn = Port n data buffer.
INTEN = Interrupt enable register.
PCH, PCL = Program counter.
TCnC = Timer n counting register.
STK0~STK3 = Stack 0 ~ stack 3 buffer.
SONiX TECHNOLOGY CO., LTD
Page 33
Version 1.2
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