SPF-3143Z View Datasheet(PDF) - Sirenza Microdevices => RFMD
Part Name
Description
MFG CO.
'SPF-3143Z' PDF : 3 Pages View PDF
SPF-3143Z Low Noise pHEMT GaAs FET
Pin #
1
2
3
4
Pin Description
Function
Gate
Source
Drain
Source
Description
RF Input / Gate Bias
Connection to ground. Use via holes to reduce lead
inductance. Place vias as close to ground leads as possible.
RF Output / Drain Bias
No Connection / Recommend grounding pin
Pin Designation
4
3
1
2
Part Number Ordering Information
Part Number
Reel Size
Devices/Reel
SPF-3143Z
7"
3000
Part Symbolization
The part will be symbolized with the “F31Z”
designator and a dot signifying pin 1 on the top
surface of the package.
Recommended PCB Layout
SOT-343
Package
Plated Thru
Holes
(0.020" DIA)
Ground
Plane
Use multiple plated-through vias holes located
close to the package pins to ensure a good RF
ground connection to a continuous groundplane
on the backside of the board.
D
e
e
HE CL F31Z
CL
b
b1
Package Dimensions
L
E
Q1
C
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
A2
2. DIMENSIONS ARE INCLUSIVE OF PLATING.
A
3. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH
& METAL BURR.
4. ALL SPECIFICATIONS COMPLY TO EIAJ SC70.
A1
5. DIE IS FACING UP FOR MOLD AND FACING DOWN
FOR TRIM/FORM. ie :REVERSE TRIM/FORM.
6. PACKAGE SURFACE TO BE MIRROR FINISH.
SYMBOL
E
D
HE
A
A2
A1
Q1
e
b
b1
c
L
NOM
1.25
2.05
2.10
1.05
0.90
0.05
0.25
0.65
0.375
0.675
0.14
0.20
303 Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC
3
http://www.sirenza.com
EDS-103162 Rev C
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