ST10F168-Q3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST10F168-Q3' PDF : 74 Pages View PDF
ST10F168
The minimum reset circuit of Figure 14 is not ade-
quate when the RSTIN pin is driven from the
ST10F168 itself during software or watchdog trig-
gered resets, because of the capacitor C1 that will
keep the voltage on RSTIN pin above VIL after the
end of the internal reset sequence, and thus will
triggered an asynchronous reset sequence.
Figure 14 shows an example of a reset circuit. In
this example, R1C1 external circuit is only used to
Figure 14 : System Reset Circuit
generate power-up or manual reset, and R0C0
circuit on VPP is used for power-up reset and to
exit from powerdown mode. Diode D1 creates a
wired-OR gate connection to the reset pin and
may be replaced by open-collector schmitt trigger
buffer. Diode D2 provides a faster cycle time for
repetitive power-on resets.
R2 is an optional pullup for faster recovery and
correct biasing of TTL Open Collector drivers.
VCC
VCC
R2
RSTOUT
RSTIN
VPP
ST10F168
External Hardware
D2
R1
VCC
R0
D1
o.d.
External
Reset Source
Open Drain Inverter
+
C0
+
C1
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