ST10F269Z2QX View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST10F269Z2QX' PDF : 161 Pages View PDF
ST10F269Z2Qx
Figure 15 : Block Diagram of GPT1
T2EUD
CPU Clock 2n n=3...10
T2IN
T2
Mode
Control
U/D
GPT1 Timer T2
Reload
Capture
Interrupt
Request
CPU Clock 2n n=3...10
T3IN
T3EUD
T3
Mode
Control
T4IN
CPU Clock 2n n=3...10
T4
Mode
Control
T4EUD
GPT1 Timer T3
U/D
Capture
Reload
GPT1 Timer T4
U/D
T3OUT
T3OTL
Interrupt
Request
Interrupt
Request
10.2 - GPT2
The GPT2 module provides precise event control
and time measurement. It includes two timers (T5,
T6) and a capture/reload register (CAPREL). Both
timers can be clocked with an input clock which is
derived from the CPU clock via a programmable
prescaler or with external signals. The count
direction (up/down) for each timer is
programmable by software or may additionally be
altered dynamically by an external signal on a port
pin (TxEUD). Concatenation of the timers is
supported via the output toggle latch (T6OTL) of
timer T6 which changes its state on each timer
overflow/underflow.
The state of this latch may be used to clock timer
T5, or it may be output on a port pin (T6OUT). The
overflow / underflow of timer T6 can additionally
be used to clock the CAPCOM timers T0 or T1,
and to cause a reload from the CAPREL register.
The CAPREL register may capture the contents of
timer T5 based on an external signal transition on
the corresponding port pin (CAPIN), and timer T5
may optionally be cleared after the capture
procedure. This allows absolute time differences
to be measured or pulse multiplication to be
performed without software overhead.
The capture trigger (timer T5 to CAPREL) may
also be generated upon transitions of GPT1 timer
T3 inputs T3IN and/or T3EUD. This is
advantageous when T3 operates in Incremental
Interface Mode.
Table 12 lists the timer input frequencies,
resolution and periods for each pre-scaler option
at 40MHz CPU clock. This also applies to the
Gated Timer Mode of T6 and to the auxiliary timer
T5 in Timer and Gated Timer Mode.
Table 12 : GPT2 Timer Input Frequencies, Resolution and Period
fCPU = 40MHz
Pre-scaler factor
Input Freq
Resolution
Period maximum
000b
4
10MHz
100ns
6.55ms
001b
8
5MHz
200ns
13.1ms
Timer Input Selection T5I / T6I
010b
16
2.5MHz
400ns
26.2ms
011b
32
1.25MHz
0.8µs
52.4ms
100b
64
625kHz
1.6µs
104.8ms
101b
110b
111b
128
312.5kHz
3.2µs
209.7ms
256
156.25kHz
6.4µs
419.4ms
512
78.125kHz
12.8µs
838.9ms
52/161
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