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2.97V TO 5.5VUART
TABLE OF CONTENTS
ST16C1450/51
REV. 4.2.0
GENERAL DESCRIPTION................................................................................................. 1
FEATURES ..................................................................................................................................................... 1
APPLICATIONS ............................................................................................................................................... 1
FIGURE 1. BLOCK DIAGRAM ............................................................................................................................................................. 1
FIGURE 2. ST16C1450 PINOUTS ..................................................................................................................................................... 2
FIGURE 3. ST16C1451 PINOUTS ..................................................................................................................................................... 3
ORDERING INFORMATION ................................................................................................................................ 4
PIN DESCRIPTIONS ......................................................................................................... 5
DATA BUS INTERFACE ............................................................................................................................................. 5
MODEM OR SERIAL I/O INTERFACE ....................................................................................................................... 5
ANCILLARY SIGNALS ................................................................................................................................................ 6
1.0 PRODUCT DESCRIPTION .................................................................................................................... 7
2.0 FUNCTIONAL DESCRIPTIONS ............................................................................................................ 7
2.1 INTERNAL REGISTERS ................................................................................................................................... 7
2.2 CRYSTAL OSCILLATOR OR EXTERNAL CLOCK ......................................................................................... 8
2.3 PROGRAMMABLE BAUD RATE GENERATOR ............................................................................................. 8
FIGURE 4. TYPICAL OSCILLATOR CONNECTIONS................................................................................................................................. 8
2.4 TRANSMITTER ................................................................................................................................................. 9
2.4.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY........................................................................................... 9
2.4.2 TRANSMITTER OPERATION....................................................................................................................................... 9
TABLE 1: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK ........................................................................ 9
2.5 RECEIVER ...................................................................................................................................................... 10
2.5.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY ............................................................................................ 10
FIGURE 5. TRANSMITTER OPERATION ............................................................................................................................................. 10
2.6 SPECIAL (ENHANCED FEATURE) MODE ................................................................................................... 11
2.6.1 SOFT RESET .............................................................................................................................................................. 11
2.6.2 POWER DOWN MODE ............................................................................................................................................... 11
2.7 INTERNAL LOOPBACK ................................................................................................................................ 11
FIGURE 6. RECEIVER OPERATION IN NON-FIFO MODE .................................................................................................................... 11
FIGURE 7. INTERNAL LOOPBACK..................................................................................................................................................... 12
3.0 UART INTERNAL REGISTERS ........................................................................................................... 13
TABLE 2: ST16C145X UART INTERNAL REGISTERS ............................................................................................................... 13
TABLE 3: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1......................................... 14
4.0 INTERNAL REGISTER DESCRIPTIONS ............................................................................................ 15
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 15
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 15
4.3 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE ............................................................................. 15
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY ............................................................................... 15
4.4.1 INTERRUPT GENERATION: ...................................................................................................................................... 16
4.4.2 INTERRUPT CLEARING: ........................................................................................................................................... 16
4.5 LINE CONTROL REGISTER (LCR) - READ/WRITE ..................................................................................... 16
TABLE 4: INTERRUPT SOURCE AND PRIORITY LEVEL ....................................................................................................................... 16
4.6 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE 18
TABLE 5: PARITY SELECTION .......................................................................................................................................................... 18
4.7 LINE STATUS REGISTER (LSR) - READ ONLY ........................................................................................... 19
4.8 MODEM STATUS REGISTER (MSR) - READ ONLY .................................................................................... 20
4.9 SCRATCH PAD REGISTER (SPR) - READ/WRITE ...................................................................................... 21
TABLE 6: UART RESET CONDITIONS ........................................................................................................................................ 21
ABSOLUTE MAXIMUM RATINGS .................................................................................. 22
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) ................................................. 22
ELECTRICAL CHARACTERISTICS................................................................................ 22
DC ELECTRICAL CHARACTERISTICS.............................................................................................................. 22
AC ELECTRICAL CHARACTERISTICS.............................................................................................................. 23
TA=0O TO 70OC (-40O TO +85OC FOR INDUSTRIAL GRADE PACKAGE), VCC IS 2.97V TO 5.5V...................... 23
FIGURE 8. CLOCK TIMING............................................................................................................................................................... 24
FIGURE 9. MODEM INPUT/OUTPUT TIMING ...................................................................................................................................... 24
FIGURE 10. DATA BUS READ TIMING .............................................................................................................................................. 25
FIGURE 11. DATA BUS WRITE TIMING ............................................................................................................................................ 25
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