9.2 DMA registers
ST18-AU1
9.2.1 Address registers
Two 16-bit registers (unsigned) are dedicated per channel for transfer address:
• DIA0-3: initial address. This register contains the initial address of the selected
address bus (see DBC-bit of DGC register).
• DCA0-3: current address. This register contains the value to be transferred to
the selected address bus (see DBC-bit of DGC register) during the next
transfer. The different DCA values are:
Reset
DAI
1
X
0
0
0
1
0
1
0
1
DLA
X
X
0
1
1
Note:
See DAIC register for DAI and DLA definitions.
DCC
X
X
X
=0
=1
DCA(n+1)
0
DCA(n)
DCA(n) + 1
DCA(n) + 1
DIA
9.2.2 Counting registers
Two 16-bit registers (unsigned) per channel are dedicated for transfer count.
For a transfer of an N data block, DIC and DCC registers have to be loaded with N-1.
When DCC content is 0 (valid transfer count), it is loaded with DIC content for the next transfer.
• DIC0-3: initial count. This register contains the total number of transfers of the
entire block.
• DCC0-3: current count. This register contains the remaining number of
transfers required to fill the entire block. It is decremented after each transfer.
The DCC values are:
Reset
1
0
0
DCC
X
=0
=1
DCA(n+1)
0
DCA(n) - 1
DIC
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