ST40RA View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST40RA

32-bit Embedded SuperH Device

STMicroelectronics 

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ST40RA

5 System configuration

Module

Addressa

Base

Top

Reference

Reserved: CPU only

registers

CPG

RTC

INTC

TMU

SCIF1

SCIF2

EMU

Reserved

0x1E10 0000 0x1FBF FFFF

0x1FC0 0000

0x1FC8 0000

0x1FD0 0000

0x1FD8 0000

0x1FE0 0000

0x1FE8 0000

0x1FF0 0000

0x1FF8 0000

0x1FC7 9999

0x1FCF FFFF

0x1FD7 9999

0x1FDF FFFF

0x1FE7 9999

0x1FEF FFFF

0x1FF7 9999

0X1FFF FFFF

Table 2: ST40RA system address map

a. For information about which address region to access for each module, see SH-4 32-bit CPU Core

Architecture, sections 2.5 and 3.4.

When operating in privilege mode, these registers should be accessed via the P2 region by adding

an offset of 0xA000 0000, when operating in user mode, access should be via the U0 address.

5.2 System identifiers

q SH-4 core processor identity: 0x0100.

q SH-4 core processor version: 0x0541D.

q ST40RA-HC8 TAP identity: 05141041.

q ST40RA-HC8 PCI identity:

­ Vendor: 104A,

­ Device: 4000,

­ Revision ID: 0x01,

­ Class: 0x4 0000,

­ Subsystem ID: 0x0000.

ADCS 7260755H

STMicroelectronics 14/94

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