ST40RA166 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST40RA166' PDF : 88 Pages View PDF
6 Electrical specifications
6.3 PCI interface AC specifications
PCLK
Outputs
Tri-state outputs
Inputs: bussed
tPCIHAOV
tPCIHAON
tPCIHAIX
Inputs : point-to-point
tPCIHPCIH
tPCIHAOZ
tBIVPCIH
tPIVPCIH
ST40RA166
Figure 10: PCI timings
Symbol
Parameter
Min
Max Units Note
tPCIHPCIH PCI clock period
15
ns
a
tPCIHAOV
tPCIHAOZ
tPCIHAON
tBIVPCIH
PCLK high to all PCI output signals valid
PCLK high to all PCI outputs tri-state
PCLK high to all PCI outputs on
Bused input signals valid to PCLK high
1
10
ns
a, b
2
14
ns
a
2
ns
a
3
ns
c
tPIVPCIH
Point-to-point input signals valid to PCLK high
5
tPCIHAIX
All PCI input signals hold after PCLK high
0
ns
b
ns
a. Specified with 30 pF load
Table 24: PCI AC timings
b. Need to use 4 ns of the PCI propagation delay
c. NOTPREQ[0:3] and NOTPGNT[0:3] are point to point signals and have different input setup times to
bussed signals. All other synchronous signals are bussed.
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