ST5088D View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST5088D' PDF : 33 Pages View PDF
ST5088
Following pin definitions are used only when COMBO I/II mode with separate MICROWIRE com-
patible serial control port is selected. (MS input set equal one)
PIN FUNCTIONS (continued)
SO
PLCC
Name
Description
12
13
CO
Control data Output: Serial control/status information is shifted
out from the PIAFE on this pin when CS- is low on the falling
odges of CCLK.
13
14
CI
Control data Input: Serial Control information is shifted into the
PIAFE on this pin when CS- is low on the rising edges of CCLK.
19
19
CCLK
Control Clock input: This clock shifts serial control information
into CI and out from CO when the CS- input is low, depending
on the current instruction. CCLK may be asynchronous with
the other system clocks.
20
20
CS-
Chip Select input: When this pin is low, control information is
written into and out from the PIAFE via CI and CO pins.
Following pin definitions are used only when the GCI mode is selected. (MS input set equal zero)
PIN FUNCTIONS (continued)
SO
PLCC
19,13,12,20 19,14,13,20
Name
A0,A1,A2,A3
Description
These pins select the address of PIAFE on GCI interface and
must be hardwired to either VCC or GND. A0,A1,A2,A3 refer to
C4,C5,C6,C7 bits of the first address byte respectively.
FUNCTIONAL DESCRIPTION
Power on initialization:
When power is first applied, power on reset
cicuitry initializes PIAFE and puts it into the power
down state. Gain Control Registers for the various
programmable gain amplifiers and programmable
switches are initialized as indicated in the Control
Register description section. All CODEC functions
are disabled. Digital Interface is configured in GCI
mode or in COMBO I/II mode depending on Mode
Select pin connection.
The desired selection for all programmable func-
tions may be intialized prior to a power up com-
mand using Monitor channel in GCI mode or MI-
CROWIRE port in COMBO I/II mode.
Power up/down control:
Following power-on initialization, power up and
power down control may be accomplished by writ-
ing any of the control instructions listed in Table 1
into PIAFE with ”P” bit set to 0 for power up or 1
for power down.
Normally, it is recommended that all programma-
ble functions be initially programmed while the
device is powered down. Power state control can
then be included with the last programming in-
struction or in a separate single byte instruction.
Any of the programmable registers may also be
modified while ST5088 is powered up or down by
setting ”P” bit as indicated. When power up or
down control is entered as a single byte instruc-
tion, bit 1 must be set to a 0.
When a power up command is given, all de-acti-
vated circuits are activated, but output DX will re-
main in the high impedance state on B time slots
until the second Fs pulse after power up, even if a
B channel is selected.
Power down state:
Following a period of activity, power down state
may be reentered by writing a power down in-
struction.
Control Registers remain in their current state and
can be changed either by MICROWIRE control in-
terface or GCI control channel depending on
mode selected.
In addition to the power down instruction, detec-
tion of loss MCLK (no transition detected) auto-
matically enters the device in ”reset” power down
state with DX output in the high impedance state
and L0 in high impedance state.
Transmit section:
Transmit analog interface is designed in two
stages to enable gains up to 35 dB to be realized.
Stage 1 is a low noise differential amplifier provid-
ing 20 dB gain. A microphone may be ca-
pacitevely connected to MIC1+, MIC1- inputs,
while the MIC2+ MIC2– inputs may be used to
capacitively connect a second microphone (for
digital handsfree operation) or an auxiliary audio
circuit such as TEA 7540 Hands-free circuit. MIC1
or MIC2 source is selected with bit 7 of register
CR4.
Following the first stage is a programmable gain
6/33
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