ST6253C View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST6253C

8-bit MCUs with A/D converter, safe reset, auto-reload timer, EEPROM and SPI

STMicroelectronics 

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ST6253C ST6263C ST6263B ST6260C ST6260B

INSTRUCTION SET (Cont’d)

Arithmetic and Logic. These instructions are

used to perform the arithmetic calculations and

logic operations. In AND, ADD, CP, SUB instruc-

tions one operand is always the accumulator while

the other can be either a data space memory con-

tent or an immediate value in relation with the ad-

dressing mode. In CLR, DEC, INC instructions the

operand can be any of the 256 data space ad-

dresses. In COM, RLC, SLA the operand is always

the accumulator.

Table 18. Arithmetic & Logic Instructions

Instruction

Addressing Mode

Bytes

ADD A, (X)

Indirect

1

ADD A, (Y)

Indirect

1

ADD A, rr

Direct

2

ADDI A, #N

Immediate

2

AND A, (X)

Indirect

1

AND A, (Y)

Indirect

1

AND A, rr

Direct

2

ANDI A, #N

Immediate

2

CLR A

Short Direct

2

CLR r

Direct

3

COM A

Inherent

1

CP A, (X)

Indirect

1

CP A, (Y)

Indirect

1

CP A, rr

Direct

2

CPI A, #N

Immediate

2

DEC X

Short Direct

1

DEC Y

Short Direct

1

DEC V

Short Direct

1

DEC W

Short Direct

1

DEC A

Direct

2

DEC rr

Direct

2

DEC (X)

Indirect

1

DEC (Y)

Indirect

1

INC X

Short Direct

1

INC Y

Short Direct

1

INC V

Short Direct

1

INC W

Short Direct

1

INC A

Direct

2

INC rr

Direct

2

INC (X)

Indirect

1

INC (Y)

Indirect

1

RLC A

Inherent

1

SLA A

Inherent

2

SUB A, (X)

Indirect

1

SUB A, (Y)

Indirect

1

SUB A, rr

Direct

2

SUBI A, #N

Immediate

2

Notes:

X,Y.Indirect Register Pointers, V & W Short Direct RegistersD. Affected

# . Immediate data (stored in ROM memory)* . Not Affected

rr. Data space register

Cycles

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

4

Flags

Z

C

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

*

*

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

*

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

Δ

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