ST62E18C View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST62E18C
STMicroelectronics
'ST62E18C' PDF : 74 Pages View PDF
ST62T18C/E18C
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST62T18C and ST62E18C devices are low
cost members of the ST62xx 8-bit HCMOS family
of microcontrollers, which are targeted at low to
medium complexity applications. All ST62xx de-
vices are based on a building block approach: a
Figure 1. Block Diagram
common core is surrounded by a number of on-
chip peripherals.
The ST62E18C is the erasable EPROM version of
the ST62T18C device, which may be used to em-
ulate the ST62T18C device, as well as the respec-
tive ST6218C ROM devices.
TE ST/VPP
NMI
TEST
8-BIT
A/D CONVERTER
INTERRUPT
PROGR AM
Memory
7948 bytes
DATA ROM
USE R
SELECTABLE
DATA RAM
192 Bytes
PORT A
PORT B
PORT D
UART
PA1 / 20 mA Sink
PA2/ARTIMout / 20 mA Sink
PA3/ARTIMin/ 20 mA Sink
PA4..PA 5/20 mA Sink
P B4..P B6/Ain
P D4/Ain/ RXD1
P D5/Ain/ TXD1
PD6,PD7/Ain
PC
STACK LEVEL 1
STACK LEVEL 2
STACK LEVEL 3
STACK LEVEL 4
STACK LEVEL 5
STACK LEVEL 6
8 BIT CORE
POWER OSCILLATOR RESET
SUPP LY
VDD VSS OSCin OSCout RESET
(VPP on EPROM/OTP versions only)
A UTORELOA D
TIMER
TIMER
DIGITAL
WATCHD OG
TIMER
VR01823F
5/82
5
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