ST72321BR9-AUTO View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST72321BR9-AUTO

8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface

STMicroelectronics 

Prev 21 22 23 24 25 26 27 28 29 30 Next

ST72321Bxxx-Auto

Introduction

1.2.3

– removed LQFP32 package

– reorganized order of Note 1 and Note 2

28. Table 145: Flash user programmable device types on page 231:

– updated to include only automotive device order codes

– added Note 1

29. Added Figure 102: Flash commercial product code structure on page 231

30. Section 21.2: ROM device ordering information and transfer of customer code on

page 232: Edited and updated content

31. Added Table 146: FASTROM factory coded device types on page 232

32. Added Figure 103: FASTROM commercial product code structure on page 233

33. Added Table 147: ROM factory coded device types on page 234

34. Figure 104: ROM commercial product code structure on page 235: Updated to include

only automotive devices

35. Section 21.3: Development tools on page 237: Edited and updated content

36. Table 148: STMicroelectronics development tools on page 238: Removed K devices

from supported products

37. Table 149: Suggested list of socket types on page 238: Removed LQFP32 device

38. Section 21.4: ST7 application notes on page 238: Removed table ST7 application

notes

39. Chapter 22: Known limitations on page 239:

– removed section ADC accuracy 32 Kbyte Flash devices

– updated workaround in Section 22.1.6: TIMD set simultaneously with OC interrupt

on page 244

– added Section 22.2: Limitations specific to 44-pin 32 Kbyte ROM devices on

page 244

Editing and formatting differences

1. Reformatted document

2. Table 1: Device summary on page 1: Updated to include only automotive specific

devices

3. Section 1.1: Description on page 18: Edited content

4. Section 4.6: IAP (in-application programming) on page 39: Removed text concerning

possibility to download code from USB and CAN interfaces

5. Section 5.3.4: Condition code (CC) register on page 41: Replaced IxSPR with ISPRx

6. Table 7: Interrupt management bits on page 42: Modified bit names

7. Monitoring the VDD main supply on page 50: Edited bullet text at end of section

8. Table 10: Effect of low power modes on SI on page 52: Added title

9. Table 11: AVD interrupt control/wake-up capability on page 52: Added title

10. Table 13: Reset source flags on page 53: Added title

11. Figure 18: Priority decision process flowchart on page 56: Changed title

12. Table 15: CPU CC register interrupt bits description on page 59: Modified bit names

13. Table 17: Interrupt priority bits on page 60: Added title

14. Table 26: MCC/RTC low power mode selection on page 70: Added title

23/247

Share Link: