ST72321M6 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST72321M6
STMicroelectronics
'ST72321M6' PDF : 175 Pages View PDF
ST72321M6 ST72321M9
9.2 MAIN CLOCK CONTROLLER WITH REAL-TIME CLOCK AND BEEPER (MCC/RTC)
The Main Clock Controller consists of three differ-
ent functions:
■ a programmable CPU clock prescaler
■ a clock-out signal to supply external devices
■ a real-time clock timer with interrupt capability
Each function can be used independently and si-
multaneously.
9.2.1 Programmable CPU Clock Prescaler
The programmable CPU clock prescaler supplies
the clock for the ST7 CPU and its internal periph-
erals. It manages Slow power saving mode (See
Section 8.2 SLOW MODE for more details).
The prescaler selects the fCPU main clock frequen-
cy and is controlled by three bits in the MCCSR
register: CP[1:0] and SMS.
9.2.2 Clock-out Capability
The clock-out capability is an alternate function of
an I/O port pin that outputs a fCPU clock to drive
external devices. It is controlled by the MCO bit in
the MCCSR register.
CAUTION: When selected, the clock out pin sus-
pends the clock during Active-halt mode.
9.2.3 Real-Time Clock Timer (RTC)
The counter of the real-time clock timer allows an
interrupt to be generated based on an accurate
real-time clock. Four different time bases depend-
ing directly on fOSC2 are available. The whole
functionality is controlled by four bits of the MCC-
SR register: TB[1:0], OIE and OIF.
When the RTC interrupt is enabled (OIE bit set),
the ST7 enters Active-halt mode when the HALT
instruction is executed. See Section 8.4 ACTIVE-
HALT AND HALT MODES for more details.
9.2.4 Beeper
The beep function is controlled by the MCCBCR
register. It can output three selectable frequencies
on the BEEP pin (I/O port alternate function).
Figure 32. Main Clock Controller (MCC/RTC) Block Diagram
MCCBCR
BC1 BC0
BEEP SIGNAL
SELECTION
BEEP
MCO
fOSC2
DIV 64
12-BIT MCC RTC
COUNTER
TO
WATCHDOG
TIMER
MCO CP1 CP0 SMS TB1 TB0 OIE OIF
MCCSR
DIV 2, 4, 8, 16
1
0
MCC/RTC INTERRUPT
fCPU
CPU CLOCK
TO CPU AND
PERIPHERALS
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