ST72325
Pin n°
Pin Name
44 - - - PA1
45 - - - PA2
46 33 31 24 PA3 (HS)
47 34 32 25 VDD_1
48 35 33 26 VSS_1
49 36 34 27 PA4 (HS)
50 37 35 28 PA5 (HS)
51 38 36 29 PA6 (HS)/SDAI
52 39 37 30 PA7 (HS)/SCLI
53 40 38 31 VPP/ ICCSEL
54 43 39 32 RESET
55 - - - EVD
56 - - - TLI
57 44 40 33 VSS_2
58 45 41 34 OSC23)
59 46 42 35 OSC13)
60 47 43 36 VDD_2
61 48 44 37 PE0/TDO
62 1 1 38 PE1/RDI
63 - - - PE2
64 - - - PE3
Level
Port
Input
Output
Main
function
(after
reset)
Alternate function
I/O CT
X
I/O CT
X
I/O CT HS X
S
ei0
ei0
ei0
S
I/O CT HS X X
I/O CT HS X X
I/O CT HS X
I/O CT HS X
I
I/O CT
I CT
S
I/O
I
S
I/O CT
I/O CT
I/O CT
I/O CT
X
XX
XX
XX
XX
X X Port A1
X X Port A2
X X Port A3
Digital Main Supply Voltage
Digital Ground Voltage
X X Port A4
X X Port A5
T
Port A6 I2C Data 1)
T
Port A7 I2C Clock 1)
Must be tied low. In flash program-
ming mode, this pin acts as the
programming voltage input VPP.
See Section 12.9.2 for more de-
tails. High voltage must not be ap-
plied to ROM devices
Top priority non maskable inter-
rupt.
External voltage detector
Top level interrupt input pin
Digital Ground Voltage
Resonator oscillator inverter out-
put
External clock input or Resonator
oscillator inverter input
Digital Main Supply Voltage
X X Port E0 SCI Transmit Data Out
X X Port E1 SCI Receive Data In
X X Port E2
X X Port E3
14/193