ST72331N4 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST72331N4
8-BIT MCU WITH 8 TO 16K OTP/EPROM, 256 EEPROM, 384 TO 512 BYTES RAM, ADC, WDG, SCI, SPI AND 2 TIMERS
STMicroelectronics
'ST72331N4' PDF : 107 Pages View PDF
ST72E331 ST72T331
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST72T331 HCMOS Microcontroller Unit
(MCU) is a member of the ST7 family. The device
is based on an industry-standard 8-bit core and
features an enhanced instruction set. The device
is normally operated at a 16 MHz oscillator fre-
quency. Under software control, the ST72T331
may be placed in either Wait, Slow or Halt modes,
thus reducing power consumption. The enhanced
instruction set and addressing modes afford real
programming potential. In addition to standard
8-bit data management, the ST72T331 features
true bit manipulation, 8x8 unsigned multiplication
and indirect addressing modes on the whole mem-
ory. The device includes a low consumption and
Figure 1. ST72T331 Block Diagram
fast start on-chip oscillator, CPU, program memo-
ry (OTP/EPROM versions), EEPROM, RAM, 44
(QFP64 and SDIP56) or 32 (QFP44 and SDIP42)
I/O lines, a Low Voltage Detector (LVD) and the
following on-chip peripherals: Analog-to-Digital
converter (ADC) with 8 (QFP64, SDIP56) or 6
(QFP44, SDIP42) multiplexed analog inputs, in-
dustry standard synchronous SPI and asynchro-
nous SCI serial interfaces, digital Watchdog, two
independent 16-bit Timers, one featuring an Exter-
nal Clock Input, and both featuring Pulse Genera-
tor capabilities, 2 Input Captures and 2 Output
Compares (only 1 Input Capture and 1 Output
Compare on Timer A).
OSCIN
OSCOUT
RESET
PF0 -> PF2,4,6,7
(6 bits)
VDD
VSS
OSC
Internal
CLOCK
CONTROL
AND LVD
8-BIT CORE
ALU
PROGRAM
MEMORY
(8 - 16K Bytes)
EEPROM
(256 Bytes)
RAM
(384 - 512 Bytes)
PORT F
TIMER A
POWER
SUPPLY
PORT A
PORT B
TIMER B
PORT C
SPI
PORT D
8-BIT ADC
PORT E
SCI
WATCHDOG
PA0 -> PA7
(8 bits for ST72T331N)
(5 bits for ST72T331J)
PB0 -> PB7
(8 bits for ST72T331N)
(5 bits for ST72T331J)
PC0 -> PC7
(8 bits)
PD0 -> PD7
(8 bits for ST72T331N)
(6 bits for ST72T331J)
PE0 -> PE7
(6 bits for ST72T331N)
(2 bits for ST72T331J)
VDDA
VSSA
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