ST72331N4 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST72331N4
8-BIT MCU WITH 8 TO 16K OTP/EPROM, 256 EEPROM, 384 TO 512 BYTES RAM, ADC, WDG, SCI, SPI AND 2 TIMERS
STMicroelectronics
'ST72331N4' PDF : 107 Pages View PDF
ST72E331 ST72T331
SERIAL PERIPHERAL INTERFACE (Cont’d)
5.6.5 Low Power Modes
Mode
WAIT
HALT
Description
No effect on SPI.
SPI interrupt events cause the device to exit from WAIT mode.
SPI registers are frozen.
In HALT mode, the SPI is inactive. SPI operation resumes when the MCU is woken up by an interrupt with
“exit from HALT mode” capability.
5.6.6 Interrupts
Interrupt Event
SPI End of Transfer Event
Master Mode Fault Event
Note: The SPI interrupt events are connected to
the same interrupt vector (see Interrupts chapter).
They generate an interrupt if the corresponding
Enable Control Bit is set and the interrupt mask in
the CC register is reset (RIM instruction).
Event
Flag
SPIF
MODF
Enable
Control
Bit
SPIE
Exit
from
Wait
Yes
Yes
Exit
from
Halt
No
No
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