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ST72331N4 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'ST72331N4' PDF : 107 Pages View PDF
ST72E331 ST72T331
8-BIT A/D CONVERTER (ADC) (Cont’d)
5.7.6 Register Description
CONTROL/STATUS REGISTER (CSR)
Read/Write
Reset Value: 0000 0000 (00h)
7
0
COCO - ADON 0
- CH2 CH1 CH0
Bit 7 = COCO Conversion Complete
This bit is set by hardware. It is cleared by soft-
ware reading the result in the DR register or writing
to the CSR register.
0: Conversion is not complete.
1: Conversion can be read from the DR register.
Bit 6 = Reserved. Must always be cleared.
Bit 5 = ADON A/D converter On
This bit is set and cleared by software.
0: A/D converter is switched off.
1: A/D converter is switched on.
Note: A typical 30 µs delay time is necessary for
the ADC to stabilize when the ADON bit is set.
Bit 4 = Reserved. Forced by hardware to 0.
Bit 3 = Reserved. Must always be cleared.
Bits 2:0: CH[2:0] Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
Table 20. Channel Selection
Pin*
AIN0
AIN1
AIN2
CH2
0
0
0
CH1
0
0
1
CH0
0
1
0
AIN3
0
1
1
AIN4
1
0
0
AIN5
1
0
1
AIN6
1
1
0
AIN7
1
1
1
*IMPORTANT NOTE: The number of pins AND
the channel selection vary according to the device.
REFER TO THE DEVICE PINOUT).
DATA REGISTER (DR)
Read Only
Reset Value: 0000 0000 (00h)
7
0
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Bit 7:0 = AD[7:0] Analog Converted Value
This register contains the converted analog value
in the range 00h to FFh.
Reading this register resets the COCO flag.
Table 21. ADC Register Map
Address
(Hex.)
Register
Name
7
6
5
4
70
Reset Value
DR
AD7
AD6
AD5
AD4
0
0
0
0
71
Reset Value
CSR
COCO
0
-
0
ADON
0
0
0
3
AD3
0
-
0
2
AD2
0
CH2
0
1
AD1
0
CH1
0
0
AD0
0
CH0
0
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85
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