ST72561
1 INTRODUCTION
The ST72561/ST72563 devices are members of
the ST7 microcontroller family designed for mid-
range applications with CAN (Controller Area Net-
work) and LIN (Local Interconnect Network) inter-
face.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set and are available with FLASH or ROM pro-
gram memory.
Figure 1. Device Block Diagram
OSC1
OSC2
OSC
option
PLL x 2
/2
VDD
VSS
RESET
TLI1
POWER
SUPPLY
CONTROL
8-BIT CORE
ALU
PROGRAM
MEMORY
(16 - 60 K Bytes)
RAM
(512 - 2048 Bytes)
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
PWM
ART
8-bit
TIMER
16-Bit
TIMER
PORT A
PORT B
PORT C
PORT D
PORT E
PORT F
SPI
LINSCI2
(LIN master)
LINSCI1
(LIN master/slave)
PA7:0
(8 bits)1
PB7:0
(8 bits)1
PC7:0
(8 bits)1
PD7:0
(8 bits)1
PE7:0
(8 bits)1
PF7:0
(8 bits)1
MCC
(Clock Control)
CAN
(2.0B ACTIVE)
WINDOW
WATCHDOG
1On some devices only, see Device Summary on page 1
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