ST72334J/N, ST72314J/N, ST72124J
SERIAL PERIPHERAL INTERFACE (Cont’d)
Figure 47. Serial Peripheral Interface Block Diagram
MOSI
MISO
SCK
SS
Internal Bus
Read
DR
Read Buffer
8-Bit Shift Register
Write
MASTER
CONTROL
IT
request
SR
SPIF WCOL - MODF -
-
-
-
SPI
STATE
CONTROL
CR
SPIE SPE SPR2 MSTR CPOL CPHA SPR1 SPR0
SERIAL
CLOCK
GENERATOR
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