ST72P361K9T3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST72P361K9T3' PDF : 224 Pages View PDF
ST72361
Pin n°
Pin Name
Level
Port
Input
Main
Output function
(after
reset)
Alternate function
54 36 26 PD4 / SCI2_RDI
55 37 27 VSSA
56 38 28 VSS_0
57 39 29 VDDA
58 40 30 VDD_0
59 41 31 PD5 / SCI2_TDO
60 42 32 RESET
61 43 - PD6 / AIN10
62 44 - PD7 / AIN11
63 - - PF6
64 - - PF7
I/O CT
S
S
I
S
I/O CT
I/O CT
I/O CT
I/O CT
I/O TT
I/O TT
X
ei3
X
X
Port D4
LINSCI2 Receive Data in-
put
Analog Ground Voltage
Digital Ground Voltage
Analog Reference Voltage for ADC
Digital Main Supply Voltage
XX
X
X
Port D5
LINSCI2 Transmit Data
output
Top priority non maskable interrupt.
X ei3 X X X Port D6 ADC Analog Input 10
X
ei3 X X X Port D7 ADC Analog Input 11
XX
X X Port F6
XX
X X Port F7
Notes:
1. In the interrupt input column, “eiX” defines the associated external interrupt vector. If the weak pull-up column (wpu) is
merged with the interrupt column (int), then the I/O configuration is pull-up interrupt input, else the configuration is floating
interrupt input.
2. Input mode can be used for general purpose I/O, output mode cannot be used.
3. OSC1 and OSC2 pins connect a crystal/ceramic resonator, or an external source to the on-chip oscillator; see Section
6 and Section 12.5 "CLOCK AND TIMING CHARACTERISTICS" for more details.
4. On the chip, each I/O port has eight pads. Pads that are not bonded to external pins are in input pull-up configuration
after reset. The configuration of these pads must be kept at reset state to avoid added current consumption.
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