ST72T311R6T1 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST72T311R6T1
STMicroelectronics
'ST72T311R6T1' PDF : 164 Pages View PDF
ST72311R, ST72511R, ST72512R, ST72532R
MAIN CLOCK CONTROLLER WITH REAL TIME CLOCK TIMER (Cont’d)
10.2.4 Register Description
MISCELLANEOUS REGISTER 1 (MISCR1)
See “MISCELLANEOUS REGISTERS” Section.
MAIN CLOCK CONTROL/STATUS REGISTER
(MCCSR)
Read / Write
Reset Value: 0000 0001 (01h)
Bit 0 = OIF Oscillator interrupt flag
This bit is set by hardware and cleared by software
reading the CSR register. It indicates when set
that the main oscillator has reached the selected
elapsed time (TB1:0).
0: Timeout not reached
1: Timeout reached
CAUTION: The BRES and BSET instructions
must not be used on the MCCSR register to avoid
unintentionally clearing the OIF bit.
7
0
0
0
0
0 TB1 TB0 OIE OIF
10.2.5 Low Power Modes
Mode
Descriptio n
Bit 7:4 = Reserved, always read as 0.
Bit 3:2 = TB[1:0] Time base control
These bits select the programmable divider time
base. They are set and cleared by software.
Coun ter
Prescaler
Time Base
fOSC =8MHz fOSC=16MHz
TB1
TB0
WAIT
ACTIVE-
HALT
HALT
No effect on MCC/RTC peripheral.
MCC/RTC interrupt cause the device to exit
from WAIT mode.
No effect on MCC/RTC counter (OIE bit is
set), the registers are frozen.
MCC/RTC interrupt cause the device to exit
from ACTIVE-HALT mode.
MCC/RTC counter and registers are frozen.
MCC/RTC operation resumes when the
MCU is woken up by an interrupt with “exit
from HALT” capability.
32000
64000
160000
400000
4ms
8ms
20ms
50ms
2ms
4ms
10ms
25ms
0
0
0
1
1
0
1
1
A modification of the time base is taken into ac-
count at the end of the current period (previously
set) to avoid an unwanted time shift. This allows to
use this time base as a real time clock.
10.2.6 Interrupts
The MCC/RTC interrupt event generates an inter-
rupt if the OIE bit of the MCCSR register is set and
the interrupt mask in the CC register is not active
(RIM instruction).
Interrupt Event
Event
Flag
Enable
Control
Bit
Exit
from
Wait
Exit
from
Halt
Bit 1 = OIE Oscillator interrupt enable
This bit set and cleared by software.
0: Oscillator interrupt disabled
1: Oscillator interrupt enabled
This interrupt can be used to exit from ACTIVE-
HALT mode.
When this bit is set, calling the ST7 software HALT
instruction enters the ACTIVE-HALT power saving
mode.
Time base overflow
event
OIF
OIE
Yes No 1)
Note:
1. The MCC/RTC interrupt allows to exit from AC-
TIVE-HALT mode, not from HALT mode.
Table 16. MCC/RTC Register Map and Reset Values
Address
(Hex.)
Register
Label
7
6
5
4
3
2
1
0
0029h
MCCSR
Reset Value
0
0
0
TB1
TB0
OIE
OI F
0
0
0
0
1
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