Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ST7565P View Datasheet(PDF) - Unspecified

Part Name
Description
MFG CO.
'ST7565P' PDF : 71 Pages View PDF
ST7565P
System Bus Connection Pins
Pin Name
D5 to D0
D6 (SCL)
D7 (SI)
A0
/RES
/CS1
CS2
/RD
(E)
/WR
(R/W)
C86
I/O
Function
No. of Pins
This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit standard
MPU data bus.
I/O
When the serial interface (SPI-4) is selected (P/S = “L”) :
D7 : serial data input (SI) ; D6 : the serial clock input (SCL).
8
D0 to D5 should be connected to VDD or floating.
When the chip select is not active, D0 to D7 are set to high impedance.
This is connect to the least significant bit of the normal MPU address bus, and it
I
determines whether the data bits are data or command.
A0 = “H”: Indicates that D0 to D7 are display data.
1
A0 = “L”: Indicates that D0 to D7 are control data.
I
When /RES is set to “L”, the register settings are initialized (cleared).
The reset operation is performed by the /RES signal level.
1
I
This is the chip select signal. When /CS1 = “L” and CS2 = “H”, then the chip select
becomes active, and data/command I/O is enabled.
2
• When connected to 8080 series MPU, this pin is treated as the “/RD” signal of the
8080 MPU and is LOW-active.
I
The data bus is in an output status when this signal is “L”.
• When connected to 6800 series MPU, this pin is treated as the “E” signal of the
1
6800 MPU and is HIGH-active.
This is the enable clock input terminal of the 6800 Series MPU.
• When connected to 8080 series MPU, this pin is treated as the “/WR” signal of the
8080 MPU and is LOW-active.
The signals on the data bus are latched at the rising edge of the /WR signal.
I • When connected to 6800 series MPU, this pin is treated as the “R/W” signal of the
1
6800 MPU and decides the access type :
When R/W = “H”: Read.
When R/W = “L”: Write.
This is the MPU interface selection pin.
I C86 = “H”: 6800 Series MPU interface.
1
C86 = “L”: 8080 Series MPU interface.
This pin configures the interface to be parallel mode or serial mode.
P/S = “H”: Parallel data input/output.
P/S = “L”: Serial data input.
The following applies depending on the P/S status:
P/S Data/Command Data Read/Write Serial Clock
P/S
I
“H”
A0
D0 to D7 /RD, /WR
X
1
“L”
A0
SI (D7) Write only SCL (D6)
When P/S = “L”, D0 to D5 must be fixed to “H”.
/RD (E) and /WR (R/W) are fixed to either “H” or “L”.
The serial access mode does NOT support read operation.
Ver 2.1b
20/71
2009/09/14
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]