ST7565S
Pin Name
CLS
M/S
CL
I/O
Function
No. of Pins
Terminal to select whether or enable or disable the display clock internal
oscillator circuit.
I CLS = “H” : used Internal oscillator circuit .
1
CLS = “L” : used external clock input .(internal oscillator is disable)
When CLS = “L”, input the display clock through the CL terminal.
This terminal selects the master/slave operation for the ST7565S Series chips.
Master operation outputs the timing signals that are required for the LCD display, while
slave operation input the timing signals required for the liquid crystal display,
Synchronizing the liquid crystal display system.
M/S = “H” Master operation
M/S = “L” Slave operation
I
M/S
CLS
Oscillator
Circuit
Power
Supply
Circuit
CL
FR
FRS
DOF
1
“H”
“H” Enabled Enabled
“L” Disabled Enabled
Output
Input
Output
Output
Output
Output
Output
Output
“L”
“H” Disabled Disabled
“L” Disabled Disabled
Input
Input
Input Output Input
Input Output Input
This is the display clock input terminal
The following is true depending on the M/S and CLS status.
M/S CLS
CL
I/O
“H”
“H”
“L”
Output
Input
1
“L”
“H”
“L”
Input
Input
FR
/DOF
FRS
IRS
/HPM
SEL3
SEL2
SEL1
TEST0 ~ 5
Ver 0.3c
O This is the liquid crystal alternating current signal terminal.
O This is the LCD blanking control terminal.
This is the output terminal for the static drive.
O This terminal is only enabled when the static indicator display is ON
and is used in conjunction with the FR terminal.
This terminal selects the resistors for the V5 voltage level adjustment.
I
IRS = “H”: Use the internal resistors
IRS = “L”: Do not use the internal resistors. The V5 voltage level is
regulated by an external resistive voltage divider attached to the VR terminal
This is the power control terminal for the power supply circuit for liquid crystal
I
drive.
/HPM = “H”: Normal mode
/HPM = “L”: High power mode
These pins are DUTY selection.
SEL 3 , 2 , 1
DUTY
BIAS
0,0,0
1/65
1/9 or 1/7
0,0,1
1/49
1/8 or 1/6
I
0,1,0
1/33
1/6 or 1/5
0,1,1
1/55
1/8 or 1/6
1,0,0
1/53
1/8 or 1/6
1, X , X
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I
These are terminals for IC testing.
They are set to open.
21/72
1
1
1
1
1
3
6
2002/07/22