ST7565S
ABSOLUTE MAXIMUM RATINGS
Unless otherwise noted, VSS = 0V
Parameter
Table 17
Symbol
Power Supply Voltage
VDD
Power supply voltage (VDD standard)
VSS2
Power supply voltage (VDD standard)
V5, VOUT
Power supply voltage (VDD standard)
V1, V2, V3, V4
Input voltage
VIN
Output voltage
VO
Operating temperature
Storage temperature
TCP
Bare chip
TOPR
TSTR
VCC
VDD
GND
VSS
Conditions
Unit
–0.3 ~ +5.0
V
–4.0 ~ -1.8
V
–16.0 ~ +0.3
V
V5 to +0.3
V
–0.3 to VDD + 0.3
V
–0.3 to VDD + 0.3
V
–40 to +85
°C
–55 to +100
–55 to +125
°C
VDD
VSS2,V1 to V4
System (MPU) side
ST7565S chip side
V5.,VOUT
Figure 30
Notes and Cautions
1. The VSS2, V1 to V5 and VOUT are relative to the VDD = 0V reference.
2. Insure that the voltage levels of V1, V2, V3, and V4 are always such that VDD ≧ V1 ≧ V2 ≧ V3 ≧ V4 ≧ V5.
3. Permanent damage to the LSI may result if the LSI is used outside of the absolute maximum ratings. Moreover, it is
recommended that in normal operation the chip be used at the electrical characteristic conditions, and use of the LSI
outside of these conditions may not only result in malfunctions of the LSI, but may have a negative impact on the LSI
reliability as well.
Ver 0.3c
59/73
2002/07/22