ST75951 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST75951' PDF : 21 Pages View PDF
ST75951
FUNCTIONAL DESCRIPTION (continued)
Table 7 : Control Register 3 : Clock / configuration setting
Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Function
011
OH CL
Software value (HM = 0)
011
0
Normal operation (INI)
011
1
PowerDown with wake-up
on ring or non-masked GPIO
011
0
Transmit modulated (INI)
011
1
Transmit not modulated
011
00
SCLK = MCLK (R = 1)
011
01
SCLK = MCLK/2 (R = 2) (INI)
011
10
SCLK = MCLK/4 (R = 4)
011
11
Reserved
011
00
Normal mode (INI)
011
01
Analog loop back
011
10
Digital loop back
011
11
Reserved
01100
Normal mode (INI)
01101
Reserved
01110
TSTD1 Pin = PCLK output
01111
TSTD1 Pin = PCLK input
Below you’ll find a table giving different programmation for achieving all common V.34 baud rate with
ST75951 working with an external crystal fQ = 36.864 MHz. The 8kHz could be used for voice processing
and the 16kHz for the 56K (V.pcm).
Table 8
Baud Rate
FS
Over
M
16000
192
2
3429
13714.29
192
2
3000
12000
256
2
3490
10472.73
320
2
3429
10285.71
256
2
2400/3200
9600
320
2
3000
9000
256
2
2953
8861.54
320
2
2743
8228.57
320
2
8000
384
2
2400
7200
320
2
Q
F0
6
1536000
7
1316571
6
1536000
5.5
1675636
7
1316571
6
1536000
8
1152000
6.5
1417846
7
1316571
6
1536000
8
1152000
In any cases attention must be paid to have F0 between 1MHz and 1.7 MHz , optimum value beeing 1.5MHz.
The modulator and demodulator frequency F0 = OVERSAMPLING FREQUENCY / 2.
When MCM = ’ 0’, we have OVERSAMPLING FREQUENCY = MCLK and F0 = MCLK / 2 SCLK = MCLK / R
(see clock block diagram).
Table 9 : (eg : with R = 4)
fS (kHz)
M
8
X
9.6
X
9.6
X
16
X
Q
Over
MCLK (MHz)
F0 (MKz)
SCLK (kHz)
X
384
3.072
1.536
768
X
320
3.072
1.536
768
X
256
2.4576
1.2288
614.4
X
192
3.072
1.536
768
16/21
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