ST7689
2. 16-bit mode
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: RRRRGGGGBBBBXXXX 1st-write
There is only 1 write operation for 1 pixel data.
1 pixel data is written in the display data RAM when 1st –write operation finishes. “X” are ignored dummy bits.
(3) 65K color input mode
1. 8-bit mode
D7, D6, D5, D4, D3, D2, D1, D0: RRRRRGGG 1st-write
D7, D6, D5, D4, D3, D2, D1, D0: GGGBBBBB
2nd-write
There are 2 write operations for 1 pixel data.
1st pixel data is written in the display data RAM when 2nd –write operation finishes.
2. 16-bit mode
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: RRRRRGGGGGGBBBBB
There is only 1 write operation for 1 pixel data.
1 pixel data is written in the display data RAM when 1st –write operation finishes.
(4) Truncated 262K color input mode
1. 8-bit mode
D7, D6, D5, D4, D3, D2, D1, D0: RRRRRRXX
1st-write
D7, D6, D5, D4, D3, D2, D1, D0: GGGGGGXX 2nd-write
D7, D6, D5, D4, D3, D2, D1, D0: BBBBBBXX
3rd-write
There are 3 write operations for 1 pixel data.
1st pixel data is written in the display data RAM when 3rd–write operation finishes. “X” are ignored dummy bits.
2. 16 bit mode
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: RRRRRRXXGGGGGGXX 1st-write
D15, D14, D13, D12, D11, D10, D9, D8, D7, D6, D5, D4, D3, D2, D1, D0: BBBBBBXXXXXXXXXXXX 2nd-write
There are 2 write operations for 1 pixel data.
1st pixel data is written in the display data RAM when 2nd –write operation finishes. “X” are ignored dummy bits.
7.1.3. 8- and 9-bit Serial Interface
The 8-bit serial interface uses four pins /CS, SI, SCL, and A0 to enter commands and data. Meanwhile, the 9-bit serial
interface uses three pins /CS, SI and SCL for the same purpose.
Data read is not available in the serial interface. Data entered must be 8 bits. The relation between gray-scale data and
data bus in the serial input is the same as that in the 8-bit parallel interface mode at every gradation.
(1) 8-bit serial interface (4-line)
When entering data (parameters): A0= HIGH at the rising edge of the 8th SCL.
Version 1.0
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2009/10