ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Instruction set
Table 49. ST7 addressing mode overview (continued)
Short
Indirect Indexed ld A,([$10],X) 00..1FE
00..FF
byte
+2
Long
Indirect Indexed ld A,([$10.w],X) 0000..FFFF
00..FF
word
+2
Relative Direct
− jrne loop
PC-128/
PC+127(1)
−
−
+1
Relative Indirect − jrne [$10]
PC-128/
PC+127(1)
00..FF
byte
+2
Bit
Direct
− bset $10,#7
00..FF
−
−
+1
Bit
Indirect − bset [$10],#7 00..FF
00..FF
byte
+2
Bit
Direct Relative btjt $10,#7,skip 00..FF
−
−
+2
Bit
Indirect Relative btjt [$10],#7,skip 00..FF
00..FF
byte
+3
1. At the time the instruction is executed, the Program Counter (PC) points to the instruction following JRxx.
12.1.1
Inherent
All Inherent instructions consist of a single byte. The opcode fully specifies all the required
information for the CPU to process the operation.
Table 50. Inherent instructions
Instruction
Function
NOP
TRAP
WFI
HALT
RET
IRET
SIM
RIM
SCF
RCF
RSP
LD
CLR
PUSH/POP
INC/DEC
TNZ
CPL, NEG
MUL
No Operation
S/W Interrupt
WAIT for Interrupt (low power mode)
HALT oscillator (lowest power mode)
Sub-routine Return
Interrupt sub-routine Return
Set Interrupt Mask (level 3)
Reset Interrupt Mask (level 0)
Set Carry Flag
Reset Carry Flag
Reset Stack Pointer
Load
Clear
Push/Pop to/from the stack
Increment/Decrement
Test Negative or Zero
1 or 2 Complement
Byte Multiplication
Doc ID 8349 Rev 5
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