ST7LITE25F2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7LITE25F2
STMicroelectronics
'ST7LITE25F2' PDF : 166 Pages View PDF
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
Register & memory map
Table 3.
Address
Hardware register map(1) (continued)
Block
Register
label
Register name
Reset
status
Remarks
0037h
ITC EICR
External Interrupt Control Register
00h
R/W
0038h
MCC MCCSR
Main Clock Control/Status Register
00h
R/W
0039h
003Ah
Clock and RCCR
Reset SICSR
RC oscillator Control Register
System Integrity Control/Status Register
FFh
R/W
0000 0XX0h R/W
003Bh
Reserved area (1 byte)
003Ch
ITC EISR
External Interrupt Selection Register
0Ch
R/W
003Dh to
0048h
Reserved area (12 bytes)
0049h
004Ah
AWU
AWUPR
AWUCSR
AWU Prescaler Register
AWU Control/Status Register
FFh
R/W
00h
R/W
004Bh
004Ch
004Dh
004Eh
004Fh
0050h
DM(4)
DMCR
DMSR
DMBK1H
DMBK1L
DMBK2H
DMBK2L
DM Control Register
DM Status Register
DM Breakpoint Register 1 High
DM Breakpoint Register 1 Low
DM Breakpoint Register 2 High
DM Breakpoint Register 2 Low
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
00h
R/W
0051h to
007Fh
Reserved area (47 bytes)
1. Legend: x = undefined, R/W = read/write.
2. The contents of the I/O port DR registers are readable only in output configuration. In input configuration, the values of the
I/O pins are returned instead of the DR register contents.
3. The bits associated with unavailable pins must always keep their reset value.
4. For a description of the Debug Module registers, see ICC reference manual.
Doc ID 8349 Rev 5
19/166
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