STA011
Programming specifications
6.1.7 PFD programming
Table 25. Frequency phase detector setting
D87 D86 D85 D84 D83
Description
Notes
x
x
1
x
1 Normal operation
Default configuration
x
x
1
0
0
Reference divider test, available @Lock
Synthesizer test reserved
configuration
x
x
1
1
0 Loop divider test available @ Lock
Synthesizer test reserved
configuration
0
0
0
x
x
Charge pump test, high impedance state
Synthesizer test reserved
configuration
0
1
0
x
x Charge pump test, DEC active
Synthesizer test reserved
configuration
1
0
0
x
x Charge pump test, INC active
Synthesizer test reserved
configuration
1
1
0
x
x Charge pump test, DEC&INC active
Synthesizer test reserved
configuration
D82
Down ASYM
0
UP and DOWN sym
Startup configuration
1
D81
UP and DOWN asym
0
Down Split disabled
1
Down Split enabled
Startup configuration
6.1.8 Fractional spurious compensation
Table 26. Fractional spurious compensation
D80
Description
0
DAC OFF
1
DAC ON
Notes
Startup configuration
Table 27. DAC current adjustment
D79 D78 D77 D76 D75
0
0
1
1
1 N=7
Description
Notes
startup configuration
Table 28.
D74
0
..
1
Down Asym delay setting
D73
Description
0
Minimum delay
..
1
Maximum delay
Notes
Startup configuration
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