STA020DJTR View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA020DJTR' PDF : 15 Pages View PDF
STA020
General description
require a minimum of 16- or 18-bit audio words respectively. In all formats other than 5 and
6, the STA020 can accept any word length from 16 to 24 bits by adding leading zeros in
format 7 and trailing zeros in the other formats, or by restricting the number of SCK periods
between active edges of FSYNC to the sample word length.
FSYNC must be derived from MCK, either through a DSP using the same clock or using
counters. If SFYNC moves (jitters) with respect to MCK by four MCK periods, the internal
counters and CBL may be reset.
Table 5. Audio port modes
M2
M1
M0
Format
0
0
0
0 - FSYNC & SCK output
0
0
1
1 - Left/Right, 16-24 bits
0
1
0
2 - Word sync, 16-24 bits
0
1
1
3 - Reserved
1
0
0
4 - Left/Right, I2S compatible
1
0
1
5 - LSB justified, 16 bits
1
1
0
6 - LSB justified, 18 bits
1
1
1
7 - MSB last, 16-24 bits
Figure 5. Audio serial port formats
FORMAT 0:
FSYNC(out)
LEFT
RIGHT
SCK(out)
SDATA(in)
MSB
FORMAT 1:
FSYNC(in)
LSB
MSB
LEFT
LSB
MSB
RIGHT
SCK(in)
SDATA(in)
MSB
FORMAT 2:
FSYNC(in)
LSB
MSB
LEFT
LSB
MSB
RIGHT
SCK(in)
SDATA(in)
MSB
LSB
MSB
FORMAT 3:
(RESERVED)
FORMAT 4:
FSYNC(in)
LEFT
RIGHT
SCK(in)
LSB
MSB
SDATA(in)
FORMAT 5:
FSYNC(in)
MSB
LSB
LEFT
MSB
LSB
RIGHT
MSB
SCK(in)
SDATA(in) LSB
MSB
LSB
MSB
LSB
FORMAT 6:
FSYNC(in)
SCK(in)
16 Bits
LEFT
16 Bits
RIGHT
SDATA(in) LSB
MSB
LSB
MSB
LSB
FORMAT 7:
FSYNC(in)
18 Bits
LEFT
18 Bits
RIGHT
SCK(in)
SDATA(in) MSB
LSB
MSB
LSB
MSB
D97AU604
DocID006832 Rev 7
7/15
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