STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
Register function
CHANNEL DELAY SETUP
SPDIF OUTPUT SETUP
COMMAND
INTERRUPT
INTERRUPT STATUS
DECODING ALGORITHM
SYSTEM SYNCHRONIZATION
POST DECODING AND PRO LOGIC
HEX
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0xAF
0xB0
0x5E
0x5F
0x60
0x61
0x75
0x7E
0x7F
0x10
0x13
0x14
0x72
0x73
0x74
0x07, 08
0x09, 0A
0x40
0x41
0x42
0x43
0x44, 45
0x46 - 4A
0x0F
0x4C
0X4D
0x4F
0x50
0x51
0x52
0x53
0x62
0xB1
0x64
0x65
0x66
0x70
DEC
87
88
89
90
91
92
93
91
92
94
95
96
97
117
126
127
16
19
20
114
115
116
7, 8
9, 10
64
65
66
67
68, 69
70
15
76
77
79
80
81
82
83
98
177
100
101
102
112
Name
LDLY (1)
RDLY (1)
CDLY (1)
SUBDLY (1)
LSDLY (1)
RSDLY (1)
UPDATE (f)
LVDLY (1)
RVDLY (1)
SPDIF_CMD (r)
SPDIF_CAT (f)
SPDIF_CONF (b)
SPDIF_STATUS (b)
SPDIF_REP_TIME (b)
SPDIF_LATENCY (f)
SPDIF_DTDI (f)
SOFTRESET (a)
PLAY (a)
MUTE (a)
RUN (a)
SKIP_MUTE_CMD (f)
SKIP_MUTE_VALUE(f)
INTE (a)
INT (a)
SYNC_STATUS
ANCCOUNT
HEAD4 (f)
HEAD3 (f)
HEADLEN (f)
PTS (f)
ERROR
STREAMSEL (r)
DECODSEL (r)
PACKET_LOCK (r)
ID_EN (a)
ID (a)
ID_EXT (a)
SYNC_LOCK (r)
PDEC1 (b)
PDEC2
PL_AB (b)
PL_DWNX (b)
OCFG
DWSMODE (b)
34/90
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