STA3398 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STA3398
STMicroelectronics
'STA3398' PDF : 78 Pages View PDF
Register description
STA339BW
7.3
Configuration register C (addr 0x02)
D7
OCRB
1
D6
Reserved
0
D5
CSZ3
0
D4
CSZ2
1
D3
CSZ1
1
D2
CSZ0
1
D1
OM1
1
D0
OM0
1
7.3.1 FFX power output mode
Bit R/W
0
R/W
1
R/W
Table 24. FFX power output mode
RST
Name
Description
1
OM0
1
OM1
Selects configuration of FFX output.
The FFX power output mode selects how the FFX output timing is configured.
Different power devices use different output modes.
OM[1,0]
00
01
10
11
Table 25. Output modes
Output stage mode
Drop compensation
Discrete output stage - tapered compensation
Full power mode
Variable drop compensation (CSZx bits)
7.3.2
FFX compensating pulse size register
Bit R/W
2
R/W
3
R/W
4
R/W
5
R/W
Table 26. FFX compensating pulse size bits
RST
Name
Description
1
CSZ0
1
CSZ1
1
CSZ2
0
CSZ3
When OM[1,0] = 11, this register determines the size
of the FFX compensating pulse from 0 clock ticks to
15 clock periods.
CSZ[3:0]
0000
0001
…
1111
Table 27. Compensating pulse size
Compensating pulse size
0 ns (0 tick) compensating pulse size
20 ns (1 tick) clock period compensating pulse size
…
300 ns (15 tick) clock period compensating pulse size
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DocID15251 Rev 7
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