STLC2415 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STLC2415' PDF : 22 Pages View PDF
STLC2415
Figure 2. Block Diagram and Electrical Schematic
JTAG
VDD
100nF
VDDIO
100nF
VDDIO
100nF
13
RF BUS
RADIO
I/F
(*)
22pF
LPOCLKP
Y2
32KHz
22pF
LPOCLKN
VDDPLL
VDD
100nF
5
BLUETOOTH
CORE
ARM7
TDMI
D
M RAM
A
4
PCM
INTERRUPT
2
CONTROLLER
2
USB
2
I2C
APB
BRIDGE
TIMER
4
SPI
16
GPIO
PCM
EXT._INT1/2
USB
I2C
SPI
GPIO(O..15)
START
DETECT
8
UART
UART2
LPO
BOOT
ROM
UART
FIFO
DATA(0..15)
16
16
ADDR(0..19) 20
18
WRN
EMI
RDN 1 1
CSN(0)
2
UART
SYSTEM
CONTROL
DATA(0..15)
ADDR(1..18)
NW
NG
NE
2
4Mbit
FLASH
UART1
NRESET
SYS_CLK_REQ
VDD
100nF
1
2
1
5
16
1
1
XIN BOOT CSN(1..2)
RDN/NG ADDR DATA(0..15)
(0,2,17,18,19)
CSN(0) NE
(*) If a low-power clock is available, it can be connected to the LPOCLKP pin in stead of using a crystal
(**) For device testing only (should not be connected in the application.
NRP NWP D03TL582A
(**)
4/22
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