Memory and register map
STM8S105xx
Table 7: Flash, Data EEPROM and RAM boundary addresses
Memory area
Size (bytes)
Start address
End address
Flash program memory 32K
0x00 8000
0x00 FFFF
16K
0x00 8000
0x00 BFFF
RAM
2K
0x00 0000
0x00 07FF
Data EEPROM
1024
0x00 4000
0x00 43FF
6.2
6.2.1
Register map
I/O port hardware register map
Table 8: I/O port hardware register map
Address Block Register label Register name
0x00 5000 Port A PA_ODR
0x00 5001
PA_IDR
0x00 5002
PA_DDR
0x00 5003
PA_CR1
0x00 5004
PA_CR2
0x00 5005 Port B PB_ODR
0x00 5006
PB_IDR
0x00 5007
PB_DDR
0x00 5008
PB_CR1
0x00 5009
PB_CR2
Port A data output latch register
Port A input pin value register
Port A data direction register
Port A control register 1
Port A control register 2
Port B data output latch register
Port B input pin value register
Port B data direction register
Port B control register 1
Port B control register 2
Reset
status
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
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DocID14771 Rev 9