STULPI01A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STULPI01A' PDF : 44 Pages View PDF
STULPI01A - STULPI01B
Block description
6.18.7
Figure 8.
High speed mode entry
In high speed mode, the internal 480 MHz clock is generated by the DLL, which must be
calibrated any time device enters high speed mode by writing '00' to the XcvrSel field in the
Function Control register. During the DLL calibration it is not possible to accept any
commands, therefore to avoid any communication problems with the controller the clock on
the ULPI interface is stopped. See Figure 10 for more information.
Start-up sequence
Figure 9. RESETn behavior
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