STV0056AF
PIN INTERNAL CIRCUITRY (continued)
SDA
Input same as above.
Output pull down only : relies on external resistor
for pull-up.
Figure 17
SDA 205Ω
27
600µ/2µ ESD
GND 0V
24µ/4µ
J17 L, J17 R, U75 L, U75 R
I1 - I2 = 2 x audio / 18kΩ. eg 1VPP audio : ±55µA.
The are internal switches to match the audio level
of the different standards.
Figure 18
CPUMP L, CPUMP R
An offset on the PLL loop filter will cause an offset
in the two 1µA currents that will prevent the PLL
from drifting-off frequency.
Figure 21
Dig Synth
100µA
Pins 35-49
CPUMP L
CPUMP R
100µA
1µA
Loop Filter Tracking
1µA
VCO Input
Pins 30 - 29
I1
37 - 48
J17 L - J17 R
U75 L - U75 R
I2
HA
Input with CMOS levels.
Figure 19
HA 28
205Ω
ESD
150µA
25µ/2µ
10µ/2µ
GND 0V
XTL
Figure 20
3
XTL 31
460Ω
2
2
460Ω
3
5pF
GND 0V
DET L, DET R
I2 - I1 = f (phase error).
Figure 22
I2
Pins 36 - 47
DET L - DET R
I1
AMPLK L, AMPLK R, AGC L, AGC R
I2 and I1 from the amplitude detecting mixer.
Figure 23
Pin 38
Pin 46
AMPLK L
AMPLK R
To VCA
I2
2
I1
10kΩ
VREF 2.4V
5µA
Pin 22
Pin 39
AGC L
AGC R
160µA
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