SX1276 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'SX1276' PDF : 132 Pages View PDF
SX1276/77/78/79
WIRELESS, SENSING & TIMING
DATASHEET
4.2.11. Digital IO Pins Mapping
Six general purpose IO pins are available on the SX1276/77/78/79, and their configuration in Continuous or Packet mode
is controlled through RegDioMapping1 and RegDioMapping2.
Table 29 DIO Mapping, Continuous Mode
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIOx Mapping
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Sleep
-
-
-
-
ClkOut if RC
-
-
Standby
FSRx/Tx
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
TempChange / LowBat
-
ModeReady
ClkOut
-
ModeReady
Rx
SyncAddress
Rssi / PreambleDetect
RxReady
Dclk
Rssi / PreambleDetect
Tx
TxReady
-
TxReady
-
Data
Data
Data
Data
Timeout
-
Rssi / PreambleDetect
-
TempChange / LowBat
TempChange / LowBat
PllLock
TimeOut
-
ModeReady
ClkOut
PllLock
Rssi / PreambleDetect
-
ModeReady
Table 30 DIO Mapping, Packet Mode
DIO0
DIO1
DIO2
DIO3
DIO4
DIO5
DIOx Mapping
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Sleep
-
FifoLevel
FifoEmpty
FifoFull
FifoFull
FifoEmpty
FifoEmpty
FifoEmpty
-
-
ClkOut if RC
-
-
Standby
FSRx/Tx
-
-
-
TempChange / LowBat
FifoLevel
FifoEmpty
FifoFull
-
-
FifoFull
FifoFull
FifoFull
FifoEmpty
-
FifoEmpty
FifoEmpty
TempChange / LowBat
-
-
ClkOut
-
ModeReady
Rx
PayloadReady
CrcOk
Tx
PacketSent
-
TempChange / LowBat
FifoLevel
FifoEmpty
FifoFull
FifoFull
RxReady
-
TimeOut
FifoFull
SyncAddress
FifoFull
FifoEmpty
TxReady
FifoEmpty
FifoEmpty
TempChange / LowBat
PllLock
TimeOut
-
Rssi / PreambleDetect
-
ClkOut
PllLock
Data
ModeReady
Rev. 4 - March 2015
©2015 Semtech Corporation
Page 69
www.semtech.com
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