XE8801A – SX8801R
1.3 Pin assignment
The table below gives a short description of the different pin assignments.
Pin
VBAT
VSS
VREG
VPP/TEST
RESET
OSCIN/OSCOUT
PA(7:0)
PB(7:0)
PC(7:0)
AC_A(7:0)
AC_R(3:0)
VMULT
Assignment
Positive power supply
Negative power supply
Connection for the mandatory external capacitor of the voltage regulator
High voltage supply for flash memory programming (NC in ROM versions)
Resets the circuit when the voltage is high
Quartz crystal connections, also used for flash memory programming
Parallel input port A pins
Parallel I/O port B pins
Parallel I/O port C pins
Acquisition chain input pins
Acquisition chain reference pins
Connection for the external capacitor if VBAT is below 3V
Table 1-2. Pin assignment
Table 1-3 gives a more detailed pin map for the different pins. It also indicates the possible I/O configuration of
these pins. The indications in blue bold are the configuration at start-up. The pins CNTx pins are possible counter
inputs, PWMx are possible PWM outputs.
pin function
I/O configuration
1 PA(5)
2 PA(6)
3 PA(7)
4 PC(0)
5 PC(1)
6 PC(2)
7 PC(3)
8 PC(4)
9 PC(5)
10 PC(6)
11 PC(7)
12 PB(0)
13 PB(1)
14 PB(2)
15 PB(3)
16 PB(4)
17 PB(5)
18 PB(6)
19 PB(7)
20 VPP
21 AC_R(3)
22 AC_R(2)
23 AC_A(7)
24 AC_A(6)
25 AC_A(5)
© Semtech 2005
PWM0
PWM1
USRT_S0
USRT_S1
UART_Tx
UART_Rx
TEST
X
X
X
X
X
X
XX
XX
XX
XX
XX
XX
XX
XX
XXXXXX
XXXXXX
XXXXXX
XXXXXX
XXXXXX
XXXXXX
XXXXXX
XXXXXX
X
X
X
X
X
X
1-7
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