T2803 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T2803' PDF : 28 Pages View PDF
Figure 7-1. 3-wire Bus Protocol Timing Diagram
DATA
CLOCK
ENABLE
TL
TPER
TC
TS
TH
TEC TT
Table 7-5. 3-wire bus Protocol Table
Description
Clock period
Set time data to clock
Hold time data to clock
Clock pulse width
Set time enable to clock
Hold time enable to data
Time between two protocols
Symbol
TPER
TS
TH
TC
TL
TEC
TT
Figure 7-2. TX DATA Timing
RefCLK
Minimum Value
125
60
60
125
200
0
250
TX_DATA
TS
TH
T2803
Unit
ns
ns
ns
ns
ns
ns
ns
Set-up time TX DATA
TS
Hold time TX DATA
TH
> 8 ns
> 8 ns
When using REFCLK = 10.368 MHz, TS and TH
must be considered for falling and rising edge of
REFCLK
21
4572I–DECT–07/05
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