T89C51AC2 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51AC2' PDF : 121 Pages View PDF
Figure 24. Reading Procedure
Flash Spaces Reading
Flash Spaces Mapping
FCON = 0000aa0b(1)
Data Read
DPTR = Address
ACC = 0
Exec: MOVC A, @A+DPTR
Clear Mode
FCON = 00h
Note: 1. aa = 10 for the Hardware Security Byte.
Flash Protection from Parallel The three lock bits in Hardware Security Byte (see "In-System-Programming" section)
Programming
are programmed according to Table 26 provide different level of protection for the on-
chip code and data located in FM0 and FM1.
The only way to write these bits are the parallel mode. They are set by default to level 4
Preventing Flash Corruption
Table 26. Program Lock bit
Program Lock Bits
Security
Level
LB0
LB1
LB2 Protection Description
1
U
U
U
No program lock features enabled. MOVC instruction executed from
external program memory returns non coded data.
MOVC instructions executed from external program memory are barred
2
P
U
U to return code bytes from internal memory, EA is sampled and latched
on reset, and further parallel programming of the Flash is disabled.
3
U
P
U
Same as 2, also verify through parallel programming interface is
disabled.
4
U
U
P
Same as 3, also external execution is disabled if code roll over beyond
7FFFh
Program Lock bits
U: unprogrammed
P: programmed
WARNING: Security level 2 and 3 should only be programmed after Flash and Core
verification.
See the “Power Management” section.
42 A/T89C51AC2
4127H–8051–02/08
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