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T89C51AC2-SLSIM View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
T89C51AC2-SLSIM
Atmel
Atmel Corporation Atmel
'T89C51AC2-SLSIM' PDF : 121 Pages View PDF
Registers
Table 39. TCON Register
TCON (S:88h)
Timer/Counter Control Register
7
6
5
4
3
2
1
0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Bit
Bit
Number Mnemonic Description
Timer 1 Overflow Flag
7
TF1 Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 1 register overflows.
Timer 1 Run Control Bit
6
TR1 Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
Timer 0 Overflow Flag
5
TF0 Cleared by hardware when processor vectors to interrupt routine.
Set by hardware on Timer/Counter overflow, when Timer 0 register overflows.
Timer 0 Run Control Bit
4
TR0 Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
Interrupt 1 Edge Flag
3
IE1 Cleared by hardware when interrupt is processed if edge-triggered (see IT1).
Set by hardware when external interrupt is detected on INT1# pin.
Interrupt 1 Type Control Bit
2
IT1 Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
Interrupt 0 Edge Flag
1
IE0 Cleared by hardware when interrupt is processed if edge-triggered (see IT0).
Set by hardware when external interrupt is detected on INT0# pin.
Interrupt 0 Type Control Bit
0
IT0 Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.
Reset Value = 0000 0000b
62 A/T89C51AC2
4127H–8051–02/08
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