T89C51RD2-3CTC-M View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51RD2-3CTC-M' PDF : 86 Pages View PDF
T89C51RD2
Table 31. Program Lock bits of the SSB
Program Lock Bits
Protection description
Security
level
LB0
LB1
1
U
U No program lock features enabled.
following commands are disabled:
- program byte
2
P
U
- program status byte and boot vector
- erase status byte and boot vector
Same as 2 and following commands also disabled:
- read byte
3
X
P - read status byte and boot vector
- blank check
- program SSB level2
U: unprogrammed or "one" level.
P: programmed or "zero" level.
X:do not care
WARNING: Security level 2 and 3 should only be programmed after FLASH and code verification.
8.5. FLASH memory status
T89C51RD2 parts are delivered in standard with the ISP boot in the FLASH memory. After ISP or parallel
programming, the possible contents of the FLASH memory are summarized on the figure below:
Figure 19. FLASH memory possible contents
Boot
Boot
Boot
FC00h
Boot
Boot
Virgin
Application
Virgin
or appli
Application
Virgin
or appli
Virgin
or appli
0000h
Default
After ISP
Dedicated
ISP
After ISP
Dedicated
ISP
After parallel After parallel After parallel
programming programming programming
8.6. Boot process
Boot loader FLASH
When the user application programs its own FLASH memory, all of the low level details are handled by a code
that is permanently contained in a 1k byte “Boot FLASH” and is located in the last kilobyte of the FLASH memory
from FC00h to FFFFh (See Figure 20). A user program simply calls the common entry point in the Boot FLASH
with appropriate parameters to accomplish the desired operation. Boot FLASH operations include functions like:
55
Rev. F - 15 February, 2001
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