T89C51RD2-SMSC-M View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'T89C51RD2-SMSC-M' PDF : 86 Pages View PDF
T89C51RD2
9.4. DC Parameters for Low Voltage
TA = 0°C to +70°C; VSS = 0 V; VCC = 2.7 V to 3.6 V; F = 0 to 25 MHz.
TA = -40°C to +85°C; VSS = 0 V; VCC = 2.7 V to 3.6 V; F = 0 to 25 MHz.
Symbol
Parameter
Min
Typ(5)
Max
Unit Test Conditions
VIL
Input Low Voltage
-0.5
0.2 VCC - 0.1 V
VIH
Input High Voltage except XTAL1, RST
0.2 VCC + 0.9
VCC + 0.5
V
VIH1 Input High Voltage, XTAL1, RST
0.7 VCC
VCC + 0.5
V
VOL
Output Low Voltage, ports 1, 2, 3, 4 and 5 (6)
0.45
V IOL = 0.8 mA(4)
VOL1 Output Low Voltage, port 0, ALE, PSEN (6)
0.45
V IOL = 1.6 mA(4)
VOH
Output High Voltage, ports 1, 2, 3, 4 and 5
0.9 VCC
V IOH = -10 µA
VOH1 Output High Voltage, port 0, ALE, PSEN
0.9 VCC
V IOH = -40 µA
IIL
Logical 0 Input Current ports 1, 2, 3, 4 and 5
-50
µA Vin = 0.45 V
ILI
Input Leakage Current
±10
µA 0.45 V < Vin < VCC
ITL
Logical 1 to 0 Transition Current, ports 1, 2, 3,
4 and 5
-650
µA Vin = 2.0 V
RRST RST Pulldown Resistor
50
90
200
kΩ
CIO Capacitance of I/O Buffer
10
pF Fc = 1 MHz
TA = 25°C
IPD
Power Down Current
1
50
µA VCC = 2.7 V to 3.6 V(3)
ICCOP Power Supply Current on normal mode
0.6 Freq
(MHz) + 3 mA mA VCC = 3.6 V(1)
ICCIDLE Power Supply Current on idle mode
0.3 Freq
(MHz) + 2 mA mA VCC = 3.6 V(2)
Table 37. DC Parameters for Low Voltage
NOTES
1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 27.), VIL = VSS + 0.5 V,
VIH = VCC - 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see Figure 24.).
2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns, VIL = VSS + 0.5 V, VIH = VCC - 0.5 V; XTAL2
N.C; Port 0 = VCC; EA = RST = VSS (see Figure 25.).
3. Power Down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see Figure 26.). In addition,
the WDT must be inactive and the POF flag must be set.
4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1 and 3. The noise is
due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst
cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not necessary.
5. Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temperature..
6. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin: 10 mA
Maximum IOL per 8-bit port:
Port 0: 26 mA
Ports 1, 2 and 3: 15 mA
Maximum total IOL for all output pins: 71 mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
73
Rev. F - 15 February, 2001
Share Link: 
