TC1307
3.13 Shutdown Control Input for VOUT2
(SHDN2)
LDO#2 output is enabled when a logic high is applied
to the SHDN2 input. LDO#2 output is disabled with a
logic low tied to the SHDN2 pin. When shutdown,
LDO#2 enters a low quiescent current state and the lin-
ear pass P-Channel MOSFET is off. The RESET out-
put remains valid and is independent of SHDN2.
3.14 RESET Output (RESET)
Logic low output when voltage on VDET pin is below the
RESET Threshold Voltage. When the voltage on the
VDET pin rises above the RESET Threshold Voltage,
the RESET output will remain low for the RESET Time-
out Period and then transition to a logic high.
DS21702A-page 12
2002 Microchip Technology Inc.